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RP2040 + FPGA RISC-V AXIS Communication

YouTubeFPGA Zealot

RP2040 + FPGA RISC-V AXIS Communication

I want to explore a simple high-speed data protocol by wiring up an RP2040 PIO → FPGA AXI-Stream → MicroBlaze V FSL pipeline. The goal is to push data from the RP2040 straight into the FPGA fabric, stream it over AXIS, and deliver it directly into the MicroBlaze V’s FSL interface with minimal overhead. For this stream, I’ll be testing ...

118 views15 hours ago

MicroBlaze Tutorial: FreeRTOS Hello World Application Using MIG DDR and AXI UART

MicroBlaze Tutorial: FreeRTOS Hello World Application Using MIG DDR

Microblaze RTL Simulation and AXI Slave wrapper tutorial

Microblaze RTL Simulation and AXI Slave wrapper tutorial

anurag choudhury

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